Holiday
GEN III綜三LRA F2F3F4
The goal of this course is to help students understand how to accelerate design of the complex electronics and intelligent systems. Besides, through this course, students can get the essential components of the challenges of latest system level design from all aspects of Chips/Chiplet/IP, advanced package design, to thermal aware electrical design.
Course keywords: Intelligent System, Design Flow, EDA, Chip, Chiplet, IP, 3D-IC Course Description: This course will include 6 major topics dividing into 2 semesters and provide student essential capabilities to understand the challenges and requirement in each design phases for advanced design methodologies. They are: 1. Overall System Level Design Planning and EDA (Electronic Design Automation) 2. Digital Design and Sign-off 3. Custom, Analog and RF Design 4. RF and Simulation with DRC/LVS 5. SiP, System-in-package (Modifying Components and Netlist/Setting Design Rules), Design Verification and Manufacturing Output 6. Routing and High-Density Interconnect with Simulation In the first semester, this course will focus on the overview of system level design architecture and how EDA tools can help design planning and production. Then the course will introduce from digital IC design, analog and mixed signal IC design with close loop simulation and verification methodology. References: Cadence Design System Teaching Method: Lectures and discussions Syllabus: 1. Overall System Level Design Planning: Integrated 3D-IC Platform 2. Digital Design and Sign-off: Synthesis and Test 3. Digital Design and Sign-off: Implementation 4. Digital Design and Sign-off: Silicon Signoff, Equivalence Checking 5. Custom IC, Analog and RF Design: Circuit Design, Simulation, Modeling and RF Design 6. Custom IC, Analog and RF Design: Layout Design and Advanced Nodes Evaluation: One midterm exam and one final exam Website: eeclass
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Average Percentage 89.94
Std. Deviation 5.12
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